Ð þíí×8á|( [áDleez,p710rockchip,rk3399 +7Leez RK3399 P710aliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000ƒ/i2c@ff3e0000ˆ/serial@ff180000/serial@ff190000˜/serial@ff1a0000 /serial@ff1b0000¨/serial@ff370000°/spi@ff1c0000µ/spi@ff1d0000º/spi@ff1e0000¿/spi@ff350000Ä/spi@ff1f0000É/spi@ff200000Î/ethernet@fe300000Ø/mmc@fe310000Ý/mmc@fe320000â/mmc@fe330000cpus+cpu-mapcluster0core0çcore1çcore2çcore3çcluster1core0çcore1çcpu@0ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@1ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@2ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@3ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@100ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôcpu@101ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôl2-cache-cluster0cache^k@}ä l2-cache-cluster1cache^k@}äidle-states"pscicpu-sleeparm,idle-state/@Wxøúh„ä cluster-sleeparm,idle-state/@WøôhÐä display-subsystemrockchip,display-subsystemymemory-controllerrockchip,rk3399-dmcŒ¨›dmc_clk §disabledpmu_a53arm,cortex-a53-pmu®pmu_a72arm,cortex-a72-pmu®psci arm,psci-1.0smctimerarm,armv8-timer@®   ¹xin24m fixed-clockÐn6àxin24móä’pcie@f8000000rockchip,rk3399-pcie ÷øýaxi-baseapb-baseëpci+ ' ÅÄG ›aclkaclk-perfhclkpm0®1231syslegacyclientA`Tbq y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38ˆ‚úúàûàûà8‚ƒ„…†€(–coremgmtmgmt-stickypipepmpclkaclk §disabledinterrupt-controller¢ äpcie-ep@f8000000rockchip,rk3399-pcie-ep ÷ýúapb-basemem-base ÅÄG ›aclkaclk-perfhclkpm·Å8‚ƒ„…†€(–coremgmtmgmt-stickypipepmpclkaclk y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3Ï ídefaultû §disabledethernet@fe300000rockchip,rk3399-gmac÷þ0® 1macirq8ighfjÕfM›stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac‰ –stmmaceth §okay+¦;Rinput_jrgmiiídefaultû s ƒ ™'ÃP®(·mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ1@®@ÀðÑ€ îMœ›biuciuciu-driveciu-sampleΏy–reset§okay+ÙÐúð€ãð!"ídefault û"#$0wifi@1brcm,bcm4329-fmac÷ %® 1host-wakeídefaultû&mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ2@®AÀðÑ€+Í> ë ÎLš››biuciuciu-driveciu-sampleΏz–reset§okayÙSð e%nídefaultû'()*mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1÷þ3® y+N> ëÂNð›clk_xinclk_ahbàemmc_cardclockóy+ ~phy_arasan§okayÙ ¯"ä–usb@fe380000 generic-ehci÷þ8®ÈÉ,y-~usb§okayusb@fe3a0000 generic-ohci÷þ:®ÈÉ,y-~usb§okayusb@fe3c0000 generic-ehci÷þ<�®ÊË.y/~usb§okayusb@fe3e0000 generic-ohci÷þ>® ÊË.y/~usb§okaydebug@fe430000&arm,coresight-cpu-debugarm,primecell÷þCM ›apb_pclkçdebug@fe432000&arm,coresight-cpu-debugarm,primecell÷þC M ›apb_pclkçdebug@fe434000&arm,coresight-cpu-debugarm,primecell÷þC@M ›apb_pclkçdebug@fe436000&arm,coresight-cpu-debugarm,primecell÷þC`M ›apb_pclkçdebug@fe610000&arm,coresight-cpu-debugarm,primecell÷þaL ›apb_pclkçdebug@fe710000&arm,coresight-cpu-debugarm,primecell÷þqL ›apb_pclkçusb@fe800000rockchip,rk3399-dwc3+ˆ0ƒöøôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% –usb3-otg§okayusb@fe800000 snps,dwc3÷þ€®iöƒ›refbus_earlysuspendÉotgy01~usb2-phyusb3-phy Ñutmi_wideÚò,M§okayusb@fe900000rockchip,rk3399-dwc3+ˆ0‚„÷øôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& –usb3-otg§okayusb@fe900000 snps,dwc3÷þ®n‚÷„›refbus_earlysuspendÉhosty23~usb2-phyusb3-phy Ñutmi_wideÚò,M§okaydp@fec00000rockchip,rk3399-cdn-dp÷þÀ® +r¡>õá ë ru¡o›core-clkpclkspdifgrfy45 HJý–spdifdptxapbcoreo §disabledportsport+endpoint@0÷€6ä¦endpoint@1÷€7ä interrupt-controller@fee00000 arm,gic-v3 +ˆ¢P÷þàþð ÿðÿñÿò® ämsi-controller@fee20000arm,gic-v3-itsŸ÷þâäppi-partitionsinterrupt-partition-0ªäinterrupt-partition-1ªäsaradc@ff100000rockchip,rk3399-saradc÷ÿ®>³Pe›saradcapb_pclkÔ –saradc-apb§okayÅ8crypto@ff8b0000rockchip,rk3399-crypto÷ÿ‹@®ÐÒ…›hclk_masterhclk_slavesclkµ®¯–masterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto÷ÿ‹€@®‡ÑÓ†›hclk_masterhclk_slavesclkº¸¹–masterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2c÷ÿ+A> ëÂAU ›i2cpclk®;ídefaultû9+§okayÑ,èi2c@ff120000rockchip,rk3399-i2c÷ÿ+B> ëÂBV ›i2cpclk®#ídefaultû:+ §disabledi2c@ff130000rockchip,rk3399-i2c÷ÿ+C> ëÂCW ›i2cpclk®"ídefaultû;+§okayÑÂèi2c@ff140000rockchip,rk3399-i2c÷ÿ+D> ëÂDX ›i2cpclk®&ídefaultû<�+ §disabledi2c@ff150000rockchip,rk3399-i2c÷ÿ+E> ëÂEY ›i2cpclk®%ídefaultû=+ §disabledi2c@ff160000rockchip,rk3399-i2c÷ÿ+F> ëÂFZ ›i2cpclk®$ídefaultû>+§okayä­serial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿQ`›baudclkapb_pclk®c ídefault û?@A§okaybluetoothbrcm,bcm43438-btB ›ext_clock C +% =% ídefault ûDEFserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿRa›baudclkapb_pclk®b ídefaultûG §disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿSb›baudclkapb_pclk®d ídefaultûH§okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿTc›baudclkapb_pclk®e ídefaultûI §disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿG[›spiclkapb_pclk®DLJ J QtxrxídefaultûKLMN+ §disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿH\›spiclkapb_pclk®5LJ J QtxrxídefaultûOPQR+ §disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿI]›spiclkapb_pclk®4LJJQtxrxídefaultûSTUV+ §disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿJ^›spiclkapb_pclk®CLJJQtxrxídefaultûWXYZ+ §disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿ K_›spiclkapb_pclk®„L[[ Qtxrxídefaultû\]^_+ §disabledthermal-zonescpu-thermal[dqè`tripscpu_alert0p›Ðòpassiveäacpu_alert1$ø›Ðòpassiveäbcpu_crits›Ð òcriticalcooling-mapsmap0¦a«ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1¦bH«ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu-thermal[dqè`tripsgpu_alert0$ø›Ðòpassiveäcgpu_crits›Ð òcriticalcooling-mapsmap0¦c «dÿÿÿÿÿÿÿÿtsadc@ff260000rockchip,rk3399-tsadc÷ÿ&®a+O> q°Od›tsadcapb_pclkè –tsadc-apbºsíinitdefaultsleepûeÑfÛeå§okayûä`qos@ffa58000rockchip,rk3399-qossyscon÷ÿ¥€ änqos@ffa5c000rockchip,rk3399-qossyscon÷ÿ¥À äoqos@ffa60080rockchip,rk3399-qossyscon÷ÿ¦€ qos@ffa60100rockchip,rk3399-qossyscon÷ÿ¦ qos@ffa60180rockchip,rk3399-qossyscon÷ÿ¦€ qos@ffa70000rockchip,rk3399-qossyscon÷ÿ§ ärqos@ffa70080rockchip,rk3399-qossyscon÷ÿ§€ äsqos@ffa74000rockchip,rk3399-qossyscon÷ÿ§@ äpqos@ffa76000rockchip,rk3399-qossyscon÷ÿ§` äqqos@ffa90000rockchip,rk3399-qossyscon÷ÿ© ätqos@ffa98000rockchip,rk3399-qossyscon÷ÿ©€ ägqos@ffaa0000rockchip,rk3399-qossyscon÷ÿª äuqos@ffaa0080rockchip,rk3399-qossyscon÷ÿª€ ävqos@ffaa8000rockchip,rk3399-qossyscon÷ÿª€ äwqos@ffaa8080rockchip,rk3399-qossyscon÷ÿª€€ äxqos@ffab0000rockchip,rk3399-qossyscon÷ÿ« ähqos@ffab0080rockchip,rk3399-qossyscon÷ÿ«€ äiqos@ffab8000rockchip,rk3399-qossyscon÷ÿ«€ äjqos@ffac0000rockchip,rk3399-qossyscon÷ÿ¬ äkqos@ffac0080rockchip,rk3399-qossyscon÷ÿ¬€ älqos@ffac8000rockchip,rk3399-qossyscon÷ÿ¬€ äyqos@ffac8080rockchip,rk3399-qossyscon÷ÿ¬€€ äzqos@ffad0000rockchip,rk3399-qossyscon÷ÿ­ ä{qos@ffad8080rockchip,rk3399-qossyscon÷ÿ­€€ qos@ffae0000rockchip,rk3399-qossyscon÷ÿ® ämpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd÷ÿ1power-controller!rockchip,rk3399-power-controller-+äpower-domain@34÷"áÝAg-power-domain@33÷!ÜåAhi-power-domain@31÷ëêAj-power-domain@32÷  í쟞Akl-power-domain@35÷#ÐAm-power-domain@25÷l-power-domain@23÷ðAn-power-domain@22÷ÕfAo-power-domain@27÷ÎLAp-power-domain@28÷îAq-power-domain@8÷~}-power-domain@9÷ €-power-domain@24÷ôArs-power-domain@15÷-+power-domain@21÷ÞçrAt-power-domain@19÷åßAuv-power-domain@20÷æàAwx-power-domain@16÷-+power-domain@17÷ÙÙAyz-power-domain@18÷ÛÛA{-syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd÷ÿ2äio-domains&rockchip,rk3399-pmu-io-voltage-domain§okayH|spi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿ5}}›spiclkapb_pclk®<�ídefaultû~€+ §disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿ7}}"›baudclkapb_pclk®f ídefaultû‚ §disabledi2c@ff3c0000rockchip,rk3399-i2c÷ÿ<�+} > ëÂ} } ›i2cpclk®9ídefaultûƒ+§okayЀѨèpmic@1brockchip,rk808÷ „®óàxin32krk808-clkout2ídefaultû…Wx††’†ž†ª†¶††·Ú†æ†ó† ‡ 8äBregulatorsDCDC_REG1 vdd_center ) = O q° g™p qregulator-state-mem ”DCDC_REG2 vdd_cpu_l ) = O q° g™p qä regulator-state-mem ”DCDC_REG3 vcc_ddr ) =regulator-state-mem ­DCDC_REG4 vcc_1v8 ) = Ow@ gw@ä8regulator-state-mem ­ Åw@LDO_REG1 vcc1v8_dvp ) = Ow@ gw@ä“regulator-state-mem ”LDO_REG2 vcc1v8_hdmi ) = Ow@ gw@regulator-state-mem ”LDO_REG3 vcca_1v8 ) = Ow@ gw@regulator-state-mem ­ Åw@LDO_REG4 vccio_sd ) = O-ÆÀ g-ÆÀä”regulator-state-mem ­ Å-ÆÀLDO_REG5 vcca3v0_codec ) = O-ÆÀ g-ÆÀregulator-state-mem ”LDO_REG6 vcc_1v5 ) = Oã` gã`regulator-state-mem ­ Åã`LDO_REG7 vcc0v9_hdmi ) = O »  g » regulator-state-mem ”LDO_REG8 vcc_3v0 ) = O-ÆÀ g-ÆÀä|regulator-state-mem ­ Å-ÆÀregulator@40silergy,syr827÷@ áídefaultûˆ vdd_cpu_b O ß4 gã` è ) = þ†äregulator-state-mem ”regulator@41silergy,syr828÷A áídefaultû‰ vdd_gpu O ß4 gã` è ) = þ†ä¹regulator-state-mem ”i2c@ff3d0000rockchip,rk3399-i2c÷ÿ=+} > ëÂ} } ›i2cpclk®8ídefaultûŠ+§okayÑXèi2c@ff3e0000rockchip,rk3399-i2c÷ÿ>+} > ëÂ} } ›i2cpclk®:ídefaultû‹+ §disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB ídefaultûŒ} §disabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB ídefaultû} §disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB  ídefaultûŽ}§okayäÂpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB0 ídefaultû} §disableddfi@ff630000÷ÿc@rockchip,rk3399-dfi®ƒy ›pclk_ddr_monävideo-codec@ff650000rockchip,rk3399-vpu÷ÿe ®rq 1vepuvdpuëê ›aclkhclk iommu@ff650800rockchip,iommu÷ÿe@®sëê ›aclkiface ävideo-codec@ff660000rockchip,rk3399-vdec÷ÿf€®t í쟞›axiahbcabaccore ‘ iommu@ff660480rockchip,iommu ÷ÿf€@ÿfÀ@®uíì ›aclkiface  ä‘iommu@ff670800rockchip,iommu÷ÿg@®*áÝ ›aclkiface  §disabledrga@ff680000rockchip,rk3399-rga÷ÿh®7Üåm›aclkhclksclkjgi –coreaxiahb!efuse@ff690000rockchip,rk3399-efuse÷ÿi€+} ›pclk_efusecpu-id@7÷cpu-leakage@17÷gpu-leakage@18÷center-leakage@19÷cpu-leakage@1a÷logic-leakage@1b÷wafer-info@1c÷dma-controller@ff6d0000arm,pl330arm,primecell÷ÿm@ ® ( 3Ó ›apb_pclkä[dma-controller@ff6e0000arm,pl330arm,primecell÷ÿn@ ® ( 3Ô ›apb_pclkäJclock-controller@ff750000rockchip,rk3399-pmucru÷ÿu’›xin24mó J+}>(Jñä}clock-controller@ff760000rockchip,rk3399-cru÷ÿv’›xin24mó Jˆ+ÀÀ@ÂÁBÉÂCãÞxíD>#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂׄäsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd÷ÿw+äio-domains"rockchip,rk3399-io-voltage-domain§okay W“ d8 q” ~|mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0w¥o›dphy-refdphy-cfggrf Ž §disabledä¨usb2phy@e450rockchip,rk3399-usb2phy÷äP{›phyclkóàclk_usbphy0_480m§okayä,host-port Ž® 1linestate§okay_•ä-otg-port Ž0®ghj1otg-bvalidotg-idlinestate§okayä0usb2phy@e460rockchip,rk3399-usb2phy÷ä`|›phyclkóàclk_usbphy1_480m§okayä.host-port Ž® 1linestate§okay_•ä/otg-port Ž0®lmo1otg-bvalidotg-idlinestate§okayä2phy@f780rockchip,rk3399-emmc-phy÷÷€$–›emmcclk ™2 Ž§okayä+pcie-phyrockchip,rk3399-pcie-phyŠ›refclk Ž‡–phy §disabledäphy@ff7c0000rockchip,rk3399-typec-phy÷ÿ|~}›tcpdcoretcpdphy-ref+~>úð€•”L–uphyuphy-pipeuphy-tcphy§okaydp-port Žä4usb3-port Žä1phy@ff800000rockchip,rk3399-typec-phy÷ÿ€€›tcpdcoretcpdphy-ref+€>úð€ œM–uphyuphy-pipeuphy-tcphy§okaydp-port Žä5usb3-port Žä3watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt÷ÿ„€|®xrktimer@ff850000rockchip,rk3399-timer÷ÿ…®QhZ ›pclktimerspdif@ff870000rockchip,rk3399-spdif÷ÿ‡®BL[Qtx ›mclkhclkU×ídefaultû—o §disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿˆ®'L[[Qtxrx›i2s_clki2s_hclkVÔíbclk_onbclk_offû˜Ñ™o§okay ­ Èi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿ‰®(L[[Qtxrx›i2s_clki2s_hclkWÕídefaultûšo§okay ­ Èi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿŠ®)L[[Qtxrx›i2s_clki2s_hclkXÖo§okayä«vop@ff8f0000rockchip,rk3399-vop-lit ÷ÿ ÿ ®w+ÛÛ>ׄõáÛµÛ›aclk_vopdclk_vophclk_vop › –axiahbdclk§okayport+äendpoint@0÷€œä²endpoint@1÷€ä·endpoint@2÷€žä°endpoint@3÷€Ÿä´endpoint@4÷€ ä7iommu@ff8f3f00rockchip,iommu÷ÿ?®wÛÛ ›aclkiface §okayä›vop@ff900000rockchip,rk3399-vop-big ÷ÿ ÿ ®v+ÙÙ>ׄõáÙ´Ù›aclk_vopdclk_vophclk_vop ¡ –axiahbdclk§okayport+äendpoint@0÷€¢ä¶endpoint@1÷€£ä±endpoint@2÷€¤ä¯endpoint@3÷€¥ä³endpoint@4÷€¦ä6iommu@ff903f00rockchip,iommu÷ÿ?®vÙÙ ›aclkiface §okayä¡isp0@ff910000rockchip,rk3399-cif-isp÷ÿ‘@®+néã›ispaclkhclk §y¨~dphy §disabledports+port@0÷+iommu@ff914000rockchip,iommu ÷ÿ‘@ÿ‘P®+éã ›aclkiface  âä§isp1@ff920000rockchip,rk3399-cif-isp÷ÿ’@®,oêä›ispaclkhclk ©yª~dphy §disabledports+port@0÷+iommu@ff924000rockchip,iommu ÷ÿ’@ÿ’P®,êä ›aclkiface  âä©hdmi-soundsimple-audio-card ýi2s  0hdmi-sound§okaysimple-audio-card,cpu G«simple-audio-card,codec G¬hdmi@ff940000rockchip,rk3399-dw-hdmi÷ÿ” ®(tqpo›iahbisfrcecgrfrefo§okay Q­ídefaultû®ä¬ports+port@0÷+endpoint@0÷€¯ä¤endpoint@1÷€°äžport@1÷dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€®- ¢p£o›refpclkphy_cfggrfû–apb+ §disabledports+port@0÷+endpoint@0÷€±ä£endpoint@1÷€²äœport@1÷dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€€®. ¢q¤o›refpclkphy_cfggrfü–apb+ Ž §disabledäªports+port@0÷+endpoint@0÷€³ä¥endpoint@1÷€´äŸport@1÷dp@ff970000rockchip,rk3399-edp÷ÿ—€® jlo ›dppclkgrfídefaultûµ–dp §disabledports+port@0÷+endpoint@0÷€¶ä¢endpoint@1÷€·äport@1÷gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860÷ÿš0® 1jobmmugpuÐ#2 P#§okayŸ ]¹ädpinctrlrockchip,rk3399-pinctrl+ˆgpio@ff720000rockchip,gpio-bank÷ÿr}® i y¢ ä%gpio@ff730000rockchip,gpio-bank÷ÿs}® i y¢ ä„gpio@ff780000rockchip,gpio-bank÷ÿxP® i y¢ äCgpio@ff788000rockchip,gpio-bank÷ÿx€Q® i y¢ ä gpio@ff790000rockchip,gpio-bank÷ÿyR® i y¢ pcfg-pull-up …ä½pcfg-pull-down ’ä¾pcfg-pull-none ¡äºpcfg-pull-none-12ma ¡ ® ä¼pcfg-pull-none-13ma ¡ ® ä»pcfg-pull-none-18ma ¡ ®pcfg-pull-none-20ma ¡ ®pcfg-pull-up-2ma … ®pcfg-pull-up-8ma … ®pcfg-pull-up-18ma … ®pcfg-pull-up-20ma … ®pcfg-pull-down-4ma ’ ®pcfg-pull-down-8ma ’ ®pcfg-pull-down-12ma ’ ® pcfg-pull-down-18ma ’ ®pcfg-pull-down-20ma ’ ®pcfg-output-high ½pcfg-output-low Épcfg-input-enable Ôpcfg-input-pull-up Ô …pcfg-input-pull-down Ô ’clockclk-32k áºcifcif-clkin á ºcif-clkouta á ºedpedp-hpd áºäµgmacrgmii-pinsð Ỻ º » º ºººº»»ºº»»ärmii-pins  á º » º º ºººº»»i2c0i2c0-xfer Ẻäƒi2c1i2c1-xfer Ẻä9i2c2i2c2-xfer á¼¼ä:i2c3i2c3-xfer Ẻä;i2c4i2c4-xfer á º ºäŠi2c5i2c5-xfer á º ºä<�i2c6i2c6-xfer á º ºä=i2c7i2c7-xfer Ẻä>i2c8i2c8-xfer Ẻä‹i2s0i2s0-2ch-bus` Ẻººººi2s0-2ch-bus-bclk-off` Ẻººººi2s0-8ch-bus Ẻºººººººä˜i2s0-8ch-bus-bclk-off Ẻºººººººä™i2s1i2s1-2ch-busP Ẻºººäši2s1-2ch-bus-bclk-offP Ẻºººsdio0sdio0-bus1 á½sdio0-bus4@ á½½½½ä"sdio0-cmd á½ä#sdio0-clk áºä$sdio0-cd á½sdio0-pwr á½sdio0-bkpwr á½sdio0-wp á½sdio0-int á½sdmmcsdmmc-bus1 á½sdmmc-bus4@ á½ ½ ½ ½ä*sdmmc-clk á ºä'sdmmc-cmd á ½ä)sdmmc-cd á½ä(sdmmc-wp á½suspendap-pwroff áºddrio-pwroff áºspdifspdif-bus áºä—spdif-bus-1 áºspi0spi0-clk á½äKspi0-cs0 á½äNspi0-cs1 á½spi0-tx á½äLspi0-rx á½äMspi1spi1-clk á ½äOspi1-cs0 á ½äRspi1-rx á½äQspi1-tx á½äPspi2spi2-clk á ½äSspi2-cs0 á ½äVspi2-rx á ½äUspi2-tx á ½äTspi3spi3-clk á½ä~spi3-cs0 á½äspi3-rx á½ä€spi3-tx á½äspi4spi4-clk á½äWspi4-cs0 á½äZspi4-rx á½äYspi4-tx á½äXspi5spi5-clk á½ä\spi5-cs0 á½ä_spi5-rx á½ä^spi5-tx á½ä]testclktest-clkout0 áºtest-clkout1 áºtest-clkout2 áºtsadcotp-pin áºäeotp-out áºäfuart0uart0-xfer ὺä?uart0-cts áºä@uart0-rts áºäAuart1uart1-xfer á ½ ºäGuart2auart2a-xfer á½ ºuart2buart2b-xfer ὺuart2cuart2c-xfer ὺäHuart3uart3-xfer ὺäIuart3-cts áºuart3-rts áºuart4uart4-xfer ὺä‚uarthdcpuarthdcp-xfer ὺpwm0pwm0-pin áºäŒpwm0-pin-pull-down á¾vop0-pwm-pin áºvop1-pwm-pin áºpwm1pwm1-pin áºäpwm1-pin-pull-down á¾pwm2pwm2-pin áºäŽpwm2-pin-pull-down á¾pwm3apwm3a-pin áºäpwm3bpwm3b-pin áºhdmihdmi-i2c-xfer Ẻhdmi-cec áºä®pciepci-clkreqn-cpm áºpci-clkreqnb-cpm áºäbtbt-reg-on-h á ºäFbt-host-wake-l áºäDbt-wake-l áºäEpmicpmic-int-l á½ä…vsel1-pin á¾äˆvsel2-pin á¾ä‰usb2vcc5v0-host3-en áºäÀwifiwifi-reg-on-h á ºä¿wifi-host-wake-l áºä&opp-table-0operating-points-v2 ïä opp00 úQ–  –¨ –¨Ð œ@opp01 ú#ÃF  –¨ –¨Ðopp02 ú0£,  øP øPÐopp03 ú<Ü HHÐopp04 úG†Œ B@B@Ðopp05 úTfr *ˆ*ˆÐopp-table-1operating-points-v2 ïäopp00 úQ–  –¨ –¨Ð œ@opp01 ú#ÃF  –¨ –¨Ðopp02 ú0£,  –¨ –¨Ðopp03 ú<Ü  Yø YøÐopp04 úG†Œ ~ð~ðÐopp05 úTfr £è£èÐopp06 ú_Ø" ÈàÈàÐopp07 úkIÒ O€O€Ðopp-table-2operating-points-v2ä¸opp00 ú ë  –¨ –¨Œ0opp01 ú³Ü@  –¨ –¨Œ0opp02 úׄ  –¨ –¨Œ0opp03 úÍe  Yø YøŒ0opp04 ú#ÃF HHŒ0opp05 ú/¯ ÈàÈàŒ0chosen serial2:1500000n8external-gmac-clock fixed-clockÐsY@ àclkin_gmacóäsdio-pwrseqmmc-pwrseq-simpleB ›ext_clockídefaultû¿ ,% ä!dc5v-adpregulator-fixed dc5v_adapter ) = OLK@ gLK@äÁvcc3v3-lanregulator-fixed vcc3v3_lan ) = O2Z  g2Z  þ‡ävcc3v3-sysregulator-fixed vcc3v3_sys ) = O2Z  g2Z  þ†ä‡vcc5v0-hostregulator-fixed vcc5v0_host = ) OSì` gSì` þ†ä•vcc5v0-host3regulator-fixed vcc5v0_host3 8 ~CídefaultûÀ ) þ†vcc5v0-sysregulator-fixed vcc5v0_sys ) = OLK@ gLK@ þÁä†vdd-logpwm-regulator KÂa¨ P† vdd_log ) = O 5 g\À compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathreset-gpiosenable-active-highpwmspwm-supply