Ð
þíΑ8Ä|(
ÄD ,Samsung Galaxy J5 (2016)2samsung,j5xqcom,msm8916=handsetchosenJserial0memory@80000000Vmemoryb€reserved-memory ftz-apps@86000000b†0msmem@86300000
2qcom,smemb†0mt|hypervisor@86400000b†@mtz@86500000b†Pmreserved@86680000b†hmrmtfs@867000002qcom,rmtfs-memb†pmrfsa@867e0000b†~mmpss@86800000b†€€mœokay£`wcnss«`°º†€mœokay£•venus«P°º†€mœokay£Smba«°º†€mœokay£_tz-apps@85500000b…P°mclocksxo-board2fixed-clockÇÔ$ø£sleep-clk2fixed-clockÇÔ€£Hcpus cpu@0Vcpu2arm,cortex-a53bäõpsci
-;psciNW £;cpu@1Vcpu2arm,cortex-a53bäõpsci
-
;psciNW£<�cpu@2Vcpu2arm,cortex-a53bäõpsci
-
;psciNW£=cpu@3Vcpu2arm,cortex-a53bäõpsci
-;psciNW£>l2-cache2cache`l£idle-stateszpscicpu-sleep-02arm,idle-state‡standalone-power-collapse—@®‚¿–ÏÐà£domain-idle-statescluster-retention2domain-idle-state—A®ô¿ôÏУcluster-gdhs2domain-idle-state—A2®Ð¿ÐÏp£opp-table-cpu2operating-points-v2ñ£opp-200000000üëÂopp-400000000üׄopp-800000000ü/¯opp-998400000ü;‚`firmwarescm2qcom,scm-msm8916qcom,scmhgfcorebusifacea£]pmu2arm,cortex-a53-pmu,psci
2arm,psci-1.0üsmcpower-domain-cpu07-K£power-domain-cpu17-K£
power-domain-cpu27-K£
power-domain-cpu37-K£power-domain-cluster7K£remoteproc$2qcom,msm8916-rpm-procqcom,rpm-procsmd-edge,¨^erpm-requests2qcom,rpm-msm8916
srpm_requestsclock-controller2qcom,rpmcc-msm8916qcom,rpmccÇxo£*power-controller2qcom,msm8916-rpmpd7
£[opp-table2operating-points-v2£opp1…opp2…opp3…opp4…opp5…opp6…regulators2qcom,rpm-pm8916-regulators£·s3ÅÐÝ™põ£s4Å:Ý Îpõ£l1l2ÅO€ÝO€õ£Ml4l5Åw@Ýw@õ£Xl6Åw@Ýw@£Nl7Åw@Ýw@õ£^l8Å,@ Ý,@ £ml9Å2Z Ý2Z £™l10l11Å-pÝ-p "
@£ql12Åw@Ý-p£rl13Å.ë¸Ý.븣Yl14l15l16l17l18smp2p-hexagon2qcom,smp2p8³¬,^BQmaster-kernelamaster-kernelq£\slave-kernel
aslave-kernelˆ£Zsmp2p-wcnss2qcom,smp2p8ï,^BQmaster-kernelamaster-kernelq£—slave-kernel
aslave-kernelˆ£–smsm
2qcom,smsm ^
apps@0bq£bhexagon@1b,ˆ£awcnss@6b,ˆsoc@0 fÿÿÿÿ2simple-busrng@22000
2qcom,prngb ycorerestart@4ab0002qcom,psholdbJ°qfprom@5c000 2qcom,msm8916-qfpromqcom,qfprombÀ base1@d0bЮ£s0-p1@d0bЮ£ s0-p2@d1bÑ®£!s1-p1@d2bÒ®£"s1-p2@d2bÒ®£#s2-p1@d3bÓ®£$s2-p2@d4bÔ®£%s4-p1@d4bÔ®£&s4-p2@d5bÕ®£'s5-p1@d5bÕ®£(s5-p2@d6bÖ®£)base2@d7b×®£mode@efbﮣsram@600002qcom,rpm-msg-ramb€£sram@2900002qcom,msm8916-rpm-statsb)interconnect@4000002qcom,msm8916-bimcb@ ³thermal-sensor@4a9000#2qcom,msm8916-tsensqcom,tsens-v0_1bJJ€4Ç !"#$%&'()MÓmodebase1base2s0_p1s0_p2s1_p1s1_p2s2_p1s2_p2s4_p1s4_p2s5_p1s5_p2ä,¸òuplow£œinterconnect@5000002qcom,msm8916-pcnocbP³interconnect@5800002qcom,msm8916-snocbX@³stm@802000 2arm,coresight-stmarm,primecellb€ (stm-basestm-stimulus-base** apb_pclkatclk œdisabledout-portsportendpoint"+£.cti@810000 2arm,coresight-ctiarm,primecellb* apb_pclk œdisabledcti@811000 2arm,coresight-ctiarm,primecellb* apb_pclk œdisabledtpiu@820000!2arm,coresight-tpiuarm,primecellb‚** apb_pclkatclk œdisabledin-portsportendpoint",£1funnel@821000+2arm,coresight-dynamic-funnelarm,primecellb‚** apb_pclkatclk œdisabledin-ports port@4bendpoint"-£:port@7bendpoint".£+out-portsportendpoint"/£3replicator@824000/2arm,coresight-dynamic-replicatorarm,primecellb‚@** apb_pclkatclk œdisabledout-ports port@0bendpoint"0£5port@1bendpoint"1£,in-portsportendpoint"2£4etf@825000 2arm,coresight-tmcarm,primecellb‚P** apb_pclkatclk œdisabledin-portsportendpoint"3£/out-portsportendpoint"4£2etr@826000 2arm,coresight-tmcarm,primecellb‚`** apb_pclkatclk œdisabledin-portsportendpoint"5£0funnel@841000+2arm,coresight-dynamic-funnelarm,primecellb„** apb_pclkatclk œdisabledin-ports port@0bendpoint"6£Cport@1bendpoint"7£Dport@2bendpoint"8£Eport@3bendpoint"9£Fout-portsportendpoint":£-debug@850000&2arm,coresight-cpu-debugarm,primecellb…* apb_pclk2; œdisableddebug@852000&2arm,coresight-cpu-debugarm,primecellb… * apb_pclk2<� œdisableddebug@854000&2arm,coresight-cpu-debugarm,primecellb…@* apb_pclk2= œdisableddebug@856000&2arm,coresight-cpu-debugarm,primecellb…`* apb_pclk2> œdisabledcti@858000:2arm,coresight-cti-v8-archarm,coresight-ctiarm,primecellb…€* apb_pclk2;6? œdisabledcti@859000:2arm,coresight-cti-v8-archarm,coresight-ctiarm,primecellb…* apb_pclk2<�6@ œdisabledcti@85a000:2arm,coresight-cti-v8-archarm,coresight-ctiarm,primecellb… * apb_pclk2=6A œdisabledcti@85b000:2arm,coresight-cti-v8-archarm,coresight-ctiarm,primecellb…°* apb_pclk2>6B œdisabledetm@85c000"2arm,coresight-etm4xarm,primecellb…À** apb_pclkatclkG2; œdisabled£?out-portsportendpoint"C£6etm@85d000"2arm,coresight-etm4xarm,primecellb…Ð** apb_pclkatclkG2<� œdisabled£@out-portsportendpoint"D£7etm@85e000"2arm,coresight-etm4xarm,primecellb…à** apb_pclkatclkG2= œdisabled£Aout-portsportendpoint"E£8etm@85f000"2arm,coresight-etm4xarm,primecellb…ð** apb_pclkatclkG2> œdisabled£Bout-portsportendpoint"F£9pinctrl@10000002qcom,msm8916-pinctrlb0,Ðl|Gzˆˆ£Gblsp-i2c1-default-state”gpio2gpio3
™blsp_i2c1¢±£xblsp-i2c1-sleep-state”gpio2gpio3™gpio¢±£yblsp-i2c2-default-state”gpio6gpio7
™blsp_i2c2¢±£|blsp-i2c2-sleep-state”gpio6gpio7™gpio¢±£}blsp-i2c3-default-state”gpio10gpio11
™blsp_i2c3¢±£€blsp-i2c3-sleep-state”gpio10gpio11™gpio¢±£blsp-i2c4-default-state”gpio14gpio15
™blsp_i2c4¢±£„blsp-i2c4-sleep-state”gpio14gpio15™gpio¢±£…blsp-i2c5-default-state”gpio18gpio19
™blsp_i2c5¢±£ˆblsp-i2c5-sleep-state”gpio18gpio19™gpio¢±£‰blsp-i2c6-default-state”gpio22gpio23
™blsp_i2c6¢±£Žblsp-i2c6-sleep-state”gpio22gpio23™gpio¢±£blsp-spi1-default-state£zspi-pins”gpio0gpio1gpio3
™blsp_spi1¢±cs-pins”gpio2™gpio¢±¾blsp-spi1-sleep-state”gpio0gpio1gpio2gpio3™gpio¢Ê£{blsp-spi2-default-state£~spi-pins”gpio4gpio5gpio7
™blsp_spi2¢±cs-pins”gpio6™gpio¢±¾blsp-spi2-sleep-state”gpio4gpio5gpio6gpio7™gpio¢Ê£blsp-spi3-default-state£‚spi-pins”gpio8gpio9gpio11
™blsp_spi3¢±cs-pins”gpio10™gpio¢±¾blsp-spi3-sleep-state”gpio8gpio9gpio10gpio11™gpio¢Ê£ƒblsp-spi4-default-state£†spi-pins”gpio12gpio13gpio15
™blsp_spi4¢±cs-pins”gpio14™gpio¢±¾blsp-spi4-sleep-state”gpio12gpio13gpio14gpio15™gpio¢Ê£‡blsp-spi5-default-state£Œspi-pins”gpio16gpio17gpio19
™blsp_spi5¢±cs-pins”gpio18™gpio¢±¾blsp-spi5-sleep-state”gpio16gpio17gpio18gpio19™gpio¢Ê£blsp-spi6-default-state£spi-pins”gpio20gpio21gpio23
™blsp_spi6¢±cs-pins”gpio22™gpio¢±¾blsp-spi6-sleep-state”gpio20gpio21gpio22gpio23™gpio¢Ê£‘blsp-uart1-default-state”gpio0gpio1gpio2gpio3™blsp_uart1¢±£tblsp-uart1-sleep-state”gpio0gpio1gpio2gpio3™gpio¢Ê£ublsp-uart2-default-state”gpio4gpio5™blsp_uart2¢±£vblsp-uart2-sleep-state”gpio4gpio5™gpio¢Ê£wcamera-front-default-statepwdn-pins”gpio33™gpio¢±rst-pins”gpio28™gpio¢±mclk1-pins”gpio27
™cam_mclk1¢±camera-rear-default-statepwdn-pins”gpio34™gpio¢±rst-pins”gpio35™gpio¢±mclk0-pins”gpio26
™cam_mclk0¢±cci0-default-state”gpio29gpio30™cci_i2c¢±£Pcdc-dmic-default-stateclk-pins”gpio0
™dmic0_clk¢data-pins”gpio1™dmic0_data¢cdc-dmic-sleep-stateclk-pins”gpio0
™dmic0_clk¢±data-pins”gpio1™dmic0_data¢±cdc-pdm-default-state*”gpio63gpio64gpio65gpio66gpio67gpio68 ™cdc_pdm0¢±£dcdc-pdm-sleep-state*”gpio63gpio64gpio65gpio66gpio67gpio68 ™cdc_pdm0¢Ê£emi2s-pri-default-state ”gpio113gpio114gpio115gpio116 ™pri_mi2s¢±mi2s-pri-sleep-state ”gpio113gpio114gpio115gpio116 ™pri_mi2s¢±mi2s-pri-mclk-default-state”gpio116 ™pri_mi2s¢±mi2s-pri-mclk-sleep-state”gpio116 ™pri_mi2s¢±mi2s-pri-ws-default-state”gpio110™pri_mi2s_ws¢±mi2s-pri-ws-sleep-state”gpio110™pri_mi2s_ws¢±mi2s-sec-default-state ”gpio112gpio117gpio118gpio119 ™sec_mi2s¢±mi2s-sec-sleep-state ”gpio112gpio117gpio118gpio119 ™sec_mi2s¢±sdc1-default-state£kclk-pins ”sdc1_clk±¢cmd-pins ”sdc1_cmdÙ¢
data-pins
”sdc1_dataÙ¢
sdc1-sleep-state£lclk-pins ”sdc1_clk±¢cmd-pins ”sdc1_cmdÙ¢data-pins
”sdc1_dataÙ¢sdc2-default-state£nclk-pins ”sdc2_clk±¢cmd-pins ”sdc2_cmdÙ¢
data-pins
”sdc2_dataÙ¢
sdc2-sleep-state£pclk-pins ”sdc2_clk±¢cmd-pins ”sdc2_cmdÙ¢data-pins
”sdc2_dataÙ¢wcss-wlan-default-state#”gpio40gpio41gpio42gpio43gpio44
™wcss_wlan¢Ù£˜accel-int-default-state”gpio49™gpio¢±£§gpio-hall-sensor-default-state”gpio52™gpio¢±£¢gpio-keys-default-state”gpio107gpio109™gpio¢Ù££muic-i2c-default-state”gpio105gpio106™gpio¢±£¤muic-int-default-state”gpio121™gpio¢±£¥sdc2-cd-default-state”gpio38™gpio¢±£osensors-i2c-default-state”gpio31gpio32™gpio¢±£¦tsp-int-default-state”gpio13™gpio¢±£Štsp-ldo-en-default-state”gpio108™gpio¢±£¨clock-controller@18000002qcom,gcc-msm8916Ç7b€$HIIBxosleep_clkdsi0plldsi0pllbyteext_mclkext_pri_i2sext_sec_i2s£hwlock@19050002qcom,tcsr-mutexbPæ£syscon@19370002qcom,tcsr-msm8916sysconb“p£display-subsystem@1a00000 œdisabled
2qcom,mdssb ¬€0mdss_physvbif_phys-mnsifacebusvsync,Hˆ f£Jdisplay-controller@1a010002qcom,msm8916-mdp5qcom,mdp5b mdp_physJ, mnqsifacebuscorevsyncôKports port@0bendpoint"L£Odsi@1a98000)2qcom,msm8916-dsi-ctrlqcom,mdss-dsi-ctrlb©€\ dsi_ctrlJ,û+.II0qmnorp#mdp_coreifacebusbytepixelcore"I 'M3Nports port@0bendpoint"O£Lport@1bendpointphy@1a983002qcom,dsi-phy-28nm-lpb©ƒÔ©…€©‡€0"dsi_plldsi_phydsi_phy_regulatorÇ@m
ifaceref3N£Icamss@1b0ac002qcom,msm8916-camssHb°¬°0°°°8°€°„° ° ±Scsiphy0csiphy0_clk_muxcsiphy1csiphy1_clk_muxcsid0csid1ispifcsi_clk_muxvfe0H,NO3479'òcsiphy0csiphy1csid0csid1ispifvfe0-˜`V]^IJKLMNOPQR_cSde¢top_ahbispif_ahbcsiphy0_timercsiphy1_timercsi0_ahbcsi0csi0_phycsi0_pixcsi0_rdicsi1_ahbcsi1csi1_phycsi1_pixcsi1_rdiahbvfe0csi_vfe0vfe_ahbvfe_axiôK œdisabled'Mports port@0bport@1bcci@1b0c000"2qcom,msm8916-cciqcom,msm8226-cci b°À,2 `GH_$camss_top_ahbcci_ahbccicamss_ahbûGHKÄ´$ø`defaultnP œdisabledi2c-bus@0bÔ€ gpu@1c000002qcom,adreno-306.0qcom,adrenobÀkgsl_3d0_reg_memory,!
òkgsl_3d0_irq-coreifacememmem_ifacealt_mem_ifacegfx3d0vuiŽ-
QôRR œdisabled£ opp-table2operating-points-v2£Qopp-400000000üׄopp-19200000ü$øvideo-codec@1d000002qcom,msm8916-venusbÐð,,-‰‡ˆcoreifacebusôKxSœokayvideo-decoder2venus-decodervideo-encoder2venus-encoderiommu@1ef0000 †%2qcom,msm8916-iommuqcom,msm-iommu-v1fâbï0‹
ifacebus“£Kiommu-ctx@30002qcom,msm-iommu-v1-secb0,Fiommu-ctx@40002qcom,msm-iommu-v1-nsb@,Fiommu-ctx@50002qcom,msm-iommu-v1-secbP,Fiommu@1f08000 †%2qcom,msm8916-iommuqcom,msm-iommu-v1fð€Œ
ifacebus“£Riommu-ctx@10002qcom,msm-iommu-v1-nsb,ñiommu-ctx@20002qcom,msm-iommu-v1-nsb ,òspmi@200f0002qcom,spmi-pmic-arb(bð@@À@€ !corechnlsobsrvrintrcnfgòperiph_irq,¾¨° ˆ£Wpmic@02qcom,pm8916qcom,spmi-pmicb pon@8002qcom,pm8916-ponb½Ípwrkey2qcom,pm8941-pwrkey,Û= Ùätresin2qcom,pm8941-resin,Û= Ùœokayärwatchdog2qcom,pm8916-wdt,ï<�charger@10002qcom,pm8916-lbcbchgrbat_ifusbmisc ,[òvbat_detfast_chgchg_failchg_donebat_prestemp_okcoarse_detusb_vbuschg_goneovertemp œdisabledusb-detect@13002qcom,pm8941-miscb, òusb_vbus œdisabledtemp-alarm@24002qcom,spmi-temp-alarmb$,$ûTthermal£¡adc@31002qcom,spmi-vadcb1,1 £Tchannel@0b*
channel@7b*channel@8bchannel@9b channel@ab
channel@ebchannel@fbbattery@40002qcom,pm8916-bms-vmb@`,@@@@@@2òcv_leavecv_enterocv_goodocv_thrfifostate_chg œdisabledrtc@60002qcom,pm8941-rtcb`a
rtcalarm,ampps@a0002qcom,pm8916-mppqcom,spmi-mppb lˆ|Uˆ£Ugpio@c000 2qcom,pm8916-gpioqcom,spmi-gpiobÀl|Vˆˆ£Vpmic@12qcom,pm8916qcom,spmi-pmicb pwm2qcom,pm8916-pwm; œdisabledvibrator@c0002qcom,pm8916-vibbÀ œdisabledaudio-codec@f0002qcom,pm8916-wcd-analog-codecbðWà,ððððððððññññññìòcdc_spk_cnp_intcdc_spk_clip_intcdc_spk_ocp_intmbhc_ins_rem_det1mbhc_but_rel_detmbhc_but_press_detmbhc_ins_rem_detmbhc_switch_intcdc_ear_ocp_intcdc_hphr_ocp_intcdc_hphl_ocp_detcdc_ear_cnp_intcdc_hphr_cnp_intcdc_hphl_cnp_intFœokayWXiXY£jdma-controller@40440002qcom,bam-v1.7.0b@,”¨Ÿ¬¹œokay£cremoteproc@40800002qcom,msm8916-mss-pilb@
qdsp6rmb@ÏZZZZ#òwdogfatalreadyhandoverstop-ack-[[;cxmxt Fifacebusmemxoã\ôstop
]mss_restart€ œokay,^mbax_mpssx`bam-dmux2qcom,bam-dmuxa,
òpcpc-ackãbb
ôpcpc-ack7cc6coreiface7s
sÿÿÿÿÿÿÿÿcpu2-3-thermal 7ú Mœtripstrip-point0 ]$ø iÐEpassive£žcpu-crit ]° iÐ Ecriticalcooling-mapsmap0 tž0 y;ÿÿÿÿÿÿÿÿ<ÿÿÿÿÿÿÿÿ=ÿÿÿÿÿÿÿÿ>ÿÿÿÿÿÿÿÿgpu-thermal 7ú Mœcooling-mapsmap0 tŸ y ÿÿÿÿÿÿÿÿtripstrip-point0 ]$ø iÐEpassive£Ÿgpu-crit ]s iÐ Ecriticalcamera-thermal 7ú Mœtripstrip-point0 ]$ø iÐEhotmodem-thermal 7ú Mœtripstrip-point0 ]L iÐEhotpm8916-thermal 7d M¡tripstrip0 ]š( iEpassivetrip1 ]èH iEhottrip2 ]6h i Ecriticaltimer2arm,armv8-timer0,aliases ˆ/soc@0/mmc@7824900 /soc@0/mmc@7864900 ’/soc@0/serial@78b0000gpio-hall-sensor
2gpio-keys`defaultn¢FGPIO Hall Effect Sensorevent-hall-sensorFHall Effect SensorG4 šä «gpio-keys
2gpio-keys`defaultn£
FGPIO Buttonsbutton-volume-up
FVolume UpGkäsbutton-home FHome KeyGmä¬i2c-muic 2i2c-gpio ½Gi ÇGj`defaultn¤ extcon@252siliconmitus,sm5703-muicb%G,y`defaultn¥£“i2c-sensors 2i2c-gpio ½G ÇG n¦`default accelerometer@1d2st,lis2hh12bÏG1n§`default ÑIN3N á0-1010000-1regulator-vdd-tsp-a2regulator-fixed
îvdd_tsp_aÅ-ÆÀÝ-ÆÀ ýGl
n¨`default£‹ interrupt-parent#address-cells#size-cellsmodelcompatiblechassis-typestdout-pathdevice_typeregrangesno-maphwlocksqcom,rpm-msg-ramqcom,client-idstatusphandlesizealignmentalloc-ranges#clock-cellsclock-frequencynext-level-cacheenable-methodclocksoperating-points-v2#cooling-cellspower-domainspower-domain-namesqcom,accqcom,sawcache-levelcache-unifiedentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzclock-names#reset-cellsqcom,dload-modeinterrupts#power-domain-cellsdomain-idle-statesmboxesqcom,smd-edgeqcom,smd-channelsopp-levelvdd_l1_l2_l3-supplyvdd_l4_l5_l6-supplyvdd_l7-supplyregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-allow-set-loadregulator-system-loadqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsbits#interconnect-cellsnvmem-cellsnvmem-cell-names#qcom,sensorsinterrupt-names#thermal-sensor-cellsreg-namesremote-endpointcpuarm,cs-dev-assocarm,coresight-loses-context-with-cpugpio-controllergpio-ranges#gpio-cellspinsfunctiondrive-strengthbias-disableoutput-highbias-pull-downbias-pull-up#hwlock-cellsiommusassigned-clocksassigned-clock-parentsphysvdda-supplyvddio-supply#phy-cellsassigned-clock-ratespinctrl-namespinctrl-0memory-region#iommu-cellsqcom,iommu-secure-idqcom,eeqcom,channelmode-bootloadermode-recoverydebouncelinux,codetimeout-secio-channelsio-channel-names#io-channel-cellsqcom,pre-scaling#pwm-cells#sound-dai-cellsvdd-cdc-io-supplyvdd-cdc-tx-rx-cx-supplyvdd-micbias-supply#dma-cellsnum-channelsqcom,num-eesqcom,powered-remotelyinterrupts-extendedqcom,smem-statesqcom,smem-state-namesresetsreset-namesqcom,halt-regspll-supplydmasdma-nameslabelqcom,domainqcom,sd-linesdirectionis-compress-daiqcom,non-secure-domainpinctrl-1audio-routinglink-namesound-daimmc-ddr-1_8vbus-widthnon-removablevmmc-supplyvqmmc-supplycd-gpiosqcom,controlled-remotelytouchscreen-size-xtouchscreen-size-yvdd-supplyphy_typedr_modehnp-disablesrp-disableadp-disableahb-burst-configphy-namesextconqcom,init-seqv1p8-supplyv3p3-supplyvddpx-supplyvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,mmio#mbox-cellsframe-numberpolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicemmc0mmc1serial0linux,input-typelinux,can-disablesda-gpiosscl-gpiosst,drdy-int-pinmount-matrixregulator-namegpioenable-active-high