Ð
þíÓ8Ç|(žÇD %,embedfire,lubancat-1rockchip,rk35667EmbedFire LubanCat 1aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/ethernet@fe010000ç/mmc@fe2b0000ì/mmc@fe310000cpus cpu@0ñcpu,arm,cortex-a55ýpsci%9€F@X€e€r@„€‘¢
cpu@100ñcpu,arm,cortex-a55ýpsci%9€F@X€e€r@„€‘¢cpu@200ñcpu,arm,cortex-a55ýpsci%9€F@X€e€r@„€‘¢cpu@300ñcpu,arm,cortex-a55ýpsci%9€F@X€e€r@„€‘¢
l3-cache,cacheµÁ;H@Zopp-table-0,operating-points-v2Ïopp-408000000ÚQ–á
»
» Œ0ïœ@opp-600000000Ú#ÃFá
»
» Œ0opp-816000000Ú0£,á
»
» Œ0opp-1104000000ÚAÍ´á
»
» Œ0opp-1416000000ÚTfrá
»
» Œ0opp-1608000000Ú_Ø"áà˜à˜Œ0opp-1800000000ÚkIÒáŒ0display-subsystem,rockchip,display-subsystemfirmwarescmi
,arm,scmi-smc‚ protocol@14ý#opp-table-1,operating-points-v2Bopp-200000000ÚëÂá–¨opp-300000000Úá£á–¨opp-400000000Úׄᖨopp-600000000Ú#ÃFá–¨opp-700000000Ú)¹'á
» opp-800000000Ú/¯áB@hdmi-sound,simple-audio-card0HDMIGi2s`zokaysimple-audio-card,codecsimple-audio-card,cpu pmu,arm,cortex-a55-pmu0‹äåæç–
psci
,arm,psci-1.0smctimer,arm,armv8-timer0‹
©xin24m,fixed-clockÀn6Ðxin24m#xin32k,fixed-clockÀ€Ðxin32kãídefault#sram@10f000
,mmio-sramýð ûðsram@0,arm,scmi-shmemýsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü@›œsatapmaliverxoob‹_ sata-phy/ zdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü€ ¡¢satapmaliverxoob‹` sata-phy/ zdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3ýüÀ@‹©¦§¥ref_clksuspend_clkbus_clk=otg
Eutmi_wide/N”U zdisabled usb2-phynuhigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3ýý@‹ª©ª¨ref_clksuspend_clkbus_clk=hostusb2-phyusb3-phy
Eutmi_wide/N•Uzokayinterrupt-controller@fd400000,arm,gic-v3 ýý@ýF‹ ƒ˜©ýA³(¾usb@fd800000
,generic-ehciýý€‹‚½¾¼usbzokayusb@fd840000
,generic-ohciýý„‹ƒ½¾¼usbzokayusb@fd880000
,generic-ehciýýˆ‹…¿À¼usbzokayusb@fd8c0000
,generic-ohciýýŒ‹†¿À¼usbzokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdýýÂ[io-domains&,rockchip,rk3568-pmu-io-voltage-domainzokayÍÛé÷!syscon@fdc50000ýýÅ ,rockchip,rk3566-pipe-grfsyscon¬syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdýýÆsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconýýÈsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconýýÉ®syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconýýÊ€¯syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconýýÊ€€°clock-controller@fdd00000,rockchip,rk3568-pmucruýýÐ#/clock-controller@fdd20000,rockchip,rk3568-cruýýÒxin24m#/<�L€G†ŒëÂaxi2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2cýýÔ‹.- i2cpclkã ídefault zokayregulator@1c,tcs,tcs4525ý…¢vdd_cpu±Å×5ïŒ0ü!regulator-state-mem'pmic@20,rockchip,rk809ý "‹Ðrk808-clkout1rk808-clkout2ídefaultã#@a#o${$‡$“$Ÿ$«$·$Ã$Ï$regulatorsDCDC_REG1
¢vdd_logic±Åס ï™pqÛregulator-state-mem'DCDC_REG2¢vdd_gpu±Åס ï™pqÛCregulator-state-mem'DCDC_REG3¢vcc_ddr±ÅÛregulator-state-memòDCDC_REG4¢vdd_npu±Åס ï™pqÛregulator-state-mem'DCDC_REG5¢vcc_1v8±Å×w@ïw@regulator-state-mem'LDO_REG1¢vdda0v9_imageű×
» ï
» Wregulator-state-mem'LDO_REG2 ¢vdda_0v9±Å×
» ï
» regulator-state-mem'LDO_REG3¢vdda0v9_pmu±Å×
» ï
» regulator-state-memò
» LDO_REG4
¢vccio_acodec±Å×2Z ï2Z regulator-state-mem'LDO_REG5 ¢vccio_sd±Å×w@ï2Z regulator-state-mem'LDO_REG6¢vcc3v3_pmu±Å×2Z ï2Z regulator-state-memò
2Z LDO_REG7 ¢vcca_1v8±Å×w@ïw@Ÿregulator-state-mem'LDO_REG8¢vcca1v8_pmu±Å×w@ïw@regulator-state-memò
w@LDO_REG9¢vcca1v8_image±Å×w@ïw@Xregulator-state-mem'SWITCH_REG1¢vcc_3v3±Åregulator-state-mem'SWITCH_REG2
¢vcc3v3_sd±Å^regulator-state-mem'serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartýýÕ‹t,baudclkapb_pclk&%%ã&ídefault+8 zdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×
0 pwmpclkã'ídefaultB zdisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×
0 pwmpclkã(ídefaultB zdisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×
0 pwmpclkã)ídefaultB zdisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×0
0 pwmpclkã*ídefaultB zdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdýýÙpower-controller!,rockchip,rk3568-power-controllerM power-domain@7ýa+Mpower-domain@8ýÌÍa,-.Mpower-domain@9ý ÚÛÜa/01Mpower-domain@10ý
ñòa234567Mpower-domain@11ýía8Mpower-domain@13ý
a9Mpower-domain@14ýa:;<�Mpower-domain@15ýa=>?@AMgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostýýæ@$‹()'hjobmmugpugpubus%B/zokayxCœvideo-codec@fdea0400,rockchip,rk3568-vpuýýê‹‹hvdpuîï
aclkhclk„D/iommu@fdea0800,rockchip,rk3568-iommuýýê@‹Šaclkifaceîï/‹Drga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rgaýý뀋ZóôõaclkhclksclkN&$%
˜coreaxiahb/
video-codec@fdee0000,rockchip,rk3568-vepuýýî‹@ýþ
aclkhclk„E/
iommu@fdee0800,rockchip,rk3568-iommuýýî@‹?ýþaclkiface/
‹Emmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ@‹d ÁÂŽbiuciuciu-driveciu-sample¤¯ðÑ€Në˜reset zdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aýþ‹ hmacirqeth_wake_irq@†‰‰ÇÃĉÈWstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refNì
˜stmmacethx½FÍÞGñHzokay
rgmiioutput#I3I$ø† <�‰†a‡ÅLsY@ídefaultãJKLMN^gpOmdio,snps,dwmac-mdio phy@0,ethernet-phy-ieee802.3-c22ýOstmmac-axi-config{…•Frx-queues-config¥Gqueue0tx-queues-config»Hqueue0vop@fe040000 ýþ0þ@Ñvopgamma-lut‹”(ÝÞßàá%aclkhclkdclk_vp0dclk_vp1dclk_vp2„P/ xzokay,rockchip,rk3566-vop<�ßàaports port@0ý endpoint@2ýÛQYport@1ý port@2ý iommu@fe043e00,rockchip,rk3568-iommu ýþ>þ?‹”ÝÞaclkiface‹/ zokayPdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ‹DpclkèdphyR/ ˜apbNx zdisabledports port@0ýport@1ýdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ‹EpclkédphyS/ ˜apbNx zdisabledports port@0ýport@1ýhdmi@fe0a0000,rockchip,rk3568-dw-hdmiýþ
‹-(æç“(ÚiahbisfrcecrefídefaultãTUV/ +xëzokayüWXports port@0ýendpointÛYQport@1ýendpointÛZºqos@fe128000,rockchip,rk3568-qossysconýþ€ +qos@fe138080,rockchip,rk3568-qossysconýþ€€ :qos@fe138100,rockchip,rk3568-qossysconýþ ;qos@fe138180,rockchip,rk3568-qossysconýþ€ <�qos@fe148000,rockchip,rk3568-qossysconýþ€ ,qos@fe148080,rockchip,rk3568-qossysconýþ€€ -qos@fe148100,rockchip,rk3568-qossysconýþ .qos@fe150000,rockchip,rk3568-qossysconýþ 8qos@fe158000,rockchip,rk3568-qossysconýþ€ 2qos@fe158100,rockchip,rk3568-qossysconýþ 3qos@fe158180,rockchip,rk3568-qossysconýþ€ 4qos@fe158200,rockchip,rk3568-qossysconýþ‚ 5qos@fe158280,rockchip,rk3568-qossysconýþ‚€ 6qos@fe158300,rockchip,rk3568-qossysconýþƒ 7qos@fe180000,rockchip,rk3568-qossysconýþ qos@fe190000,rockchip,rk3568-qossysconýþ =qos@fe190280,rockchip,rk3568-qossysconýþ€ >qos@fe190300,rockchip,rk3568-qossysconýþ ?qos@fe190380,rockchip,rk3568-qossysconýþ€ @qos@fe190400,rockchip,rk3568-qossysconýþ Aqos@fe198000,rockchip,rk3568-qossysconýþ€ 9qos@fe1a8000,rockchip,rk3568-qossysconýþ€ /qos@fe1a8080,rockchip,rk3568-qossysconýþ€€ 0qos@fe1a8100,rockchip,rk3568-qossysconýþ 1dfi@fe230000,rockchip,rk3568-dfiýþ#‹[pcie@fe260000,rockchip,rk3568-pcie0ýÀ@þ&ôÑdbiapbconfig<�‹KJIHGhsyspmcmsglegacyerr)(‚ƒ„…$aclk_mstaclk_slvaclk_dbipclkauxñpci˜3`F\\\\Tetƒ’š pcie-phy/Tûôôô ô à@@N¡˜pipe zokay¤"°]legacy-interrupt-controller˜ƒ‹H\mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ+@‹b °±Š‹biuciuciu-driveciu-sample¤¯ðÑ€NÔ˜resetzokayÀÌÖèù ^ ídefaultã_`abmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ,@‹c ²³Œbiuciuciu-driveciu-sample¤¯ðÑ€NÖ˜reset zdisabledspi@fe300000
,rockchip,sfcýþ0@‹exvclk_sfchclk_sfcãcídefault zdisabledmmc@fe310000,rockchip,rk3568-dwcmshcýþ1‹<�{}|LëÂn6ëÂ(|zy{}corebusaxiblocktimerzokay̯ë + :ídefaultãdef Hi2s@fe400000,rockchip,rk3568-i2s-tdmýþ@‹4<�=ALFÏqFÏq?C9mclk_txmclk_rxhclk&g VtxNPQ
˜tx-mrx-mxë zdisabled i2s@fe410000,rockchip,rk3568-i2s-tdmýþA‹5<�EILFÏqFÏqGK:mclk_txmclk_rxhclk&gg VrxtxNRS
˜tx-mrx-mxídefault0ãhijklmnopqrsëzokay `i2s@fe420000,rockchip,rk3568-i2s-tdmýþB‹6<�MLFÏqOO;mclk_txmclk_rxhclk&gg VtxrxNT˜tx-mxídefaultãtuvwë zdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmýþC‹7SW<�mclk_txmclk_rxhclk&gg VtxrxNUV
˜tx-mrx-mxë zdisabledpdm@fe440000,rockchip,rk3568-pdmýþD‹LZYpdm_clkpdm_hclk&g Vrxãxyz{|}ídefaultNX˜pdm-më zdisabledspdif@fe460000,rockchip,rk3568-spdifýþF‹f
mclkhclk_\&g Vtxídefaultã~ë zdisableddma-controller@fe530000,arm,pl330arm,primecellýþS@‹
{
apb_pclk ’%dma-controller@fe550000,arm,pl330arm,primecellýþU@‹ {
apb_pclk ’gi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþZ‹/HG i2cpclkãídefault zdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ[‹0JI i2cpclkã€ídefault zdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ\‹1LK i2cpclkãídefault zdisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ]‹2NM i2cpclkã‚ídefault zdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ^‹3PO i2cpclkãƒídefault zdisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtýþ`‹•
tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiýþa‹gRQspiclkapb_pclk&%% Vtxrxídefaultã„…† zdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiýþb‹hTSspiclkapb_pclk&%% Vtxrxídefault㇈‰ zdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiýþc‹iVUspiclkapb_pclk&%% Vtxrxídefault㊋Œ zdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiýþd‹jXWspiclkapb_pclk&%% Vtxrxídefault㎠zdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartýþe‹ubaudclkapb_pclk&%%ãídefault+8 zdisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartýþf‹v# baudclkapb_pclk&%%ã‘ídefault+8zokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartýþg‹w'$baudclkapb_pclk&%%ã’ídefault+8 zdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartýþh‹x+(baudclkapb_pclk&%% ã“ídefault+8 zdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartýþi‹y/,baudclkapb_pclk&%
%ã”ídefault+8 zdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþj‹z30baudclkapb_pclk&%%
ã•ídefault+8 zdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþk‹{74baudclkapb_pclk&%%ã–ídefault+8 zdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþl‹|;8baudclkapb_pclk&%%ã—ídefault+8 zdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþm‹}?<�baudclkapb_pclk&%%ã˜ídefault+8 zdisabledthermal-zonescpu-thermal d ³è Á™tripscpu_alert0 Ñp ÝÐøpassivešcpu_alert1 Ñ$ø ÝÐøpassivecpu_crit Ñs ÝÐ øcriticalcooling-mapsmap0 èš0 í
ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ
ÿÿÿÿÿÿÿÿgpu-thermal ³è Á™tripsgpu-threshold Ñp ÝÐøpassivegpu-target Ñ$ø ÝÐøpassive›gpu-crit Ñs ÝÐ øcriticalcooling-mapsmap0 è› íœÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcýþq‹s<�Lf@
®`tsadcapb_pclkN‚×x üsíinitdefaultsleepã
ž
'zokay
=
T™saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcýþr‹]saradcapb_pclkN€˜saradc-apb
ozokay
Ÿpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY pwmpclkã ídefaultB zdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY pwmpclkã¡ídefaultB zdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn ZY pwmpclkã¢ídefaultB zdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn0ZY pwmpclkã£ídefaultB zdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ pwmpclkã¤ídefaultB zdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ pwmpclkã¥ídefaultB zdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo ]\ pwmpclkã¦ídefaultB zdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo0]\ pwmpclkã§ídefaultB zdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ pwmpclkã¨ídefaultB zdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ pwmpclkã©ídefaultB zdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp `_ pwmpclkãªídefaultB zdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp0`_ pwmpclkã«ídefaultB zdisabledphy@fe830000,rockchip,rk3568-naneng-combphyýþƒ"}
refapbpipe<�"LõáNÇ
¬
Ÿ
µzokayphy@fe840000,rockchip,rk3568-naneng-combphyýþ„%~
refapbpipe<�%LõáNÉ
¬
Ÿ®
µzokayphy@fe870000,rockchip,rk3568-csi-dphyýþ‡ypclk
µNº˜apbx zdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyýþ… refpclkz
µ/ ˜apbN» zdisabledRmipi-dphy@fe860000,rockchip,rk3568-dsi-dphyýþ† refpclk{
µ/ ˜apbN¼ zdisabledSusb2phy@fe8a0000,rockchip,rk3568-usb2phyýþŠphyclkÐclk_usbphy0_480m‹‡
À¯#zokayhost-port
µzokayotg-port
µzokayusb2phy@fe8b0000,rockchip,rk3568-usb2phyýþ‹phyclkÐclk_usbphy1_480m‹ˆ
À°#zokayhost-port
µzokayotg-port
µzokaypinctrl,rockchip,rk3568-pinctrlx[ û±gpio@fdd60000,rockchip,gpio-bankýýÖ‹!.
Ð
à±
샘"gpio@fe740000,rockchip,gpio-bankýþt‹"cd
Ð
à±
샘gpio@fe750000,rockchip,gpio-bankýþu‹#ef
Ð
à±@
샘Igpio@fe760000,rockchip,gpio-bankýþv‹$gh
Ð
à±`
샘gpio@fe770000,rockchip,gpio-bankýþw‹%ij
Ð
à±€
샘pcfg-pull-up
ø´pcfg-pull-none²pcfg-pull-none-drv-level-1¶pcfg-pull-none-drv-level-2µpcfg-pull-none-drv-level-3¹pcfg-pull-up-drv-level-1
ø¸pcfg-pull-up-drv-level-2
ø³pcfg-pull-none-smt!·acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out06²cpuebcedpdpemmcemmc-bus8€6³
³³³³³³³demmc-clk6³eemmc-cmd6³feth0eth1flashfspifspi-pins`6²²²²²²cgmac0gmac1gmac1m1-miim 6²²Jgmac1m1-rx-bus206²² ²Lgpuhdmitxhdmitxm0-cec6²Vhdmitx-scl6²Thdmitx-sda6²Ui2c0i2c0-xfer 6 ·
· i2c1i2c1-xfer 6··i2c2i2c2m0-xfer 6
··€i2c3i2c3m0-xfer 6··i2c4i2c4m0-xfer 6·
·‚i2c5i2c5m0-xfer 6··ƒi2s1i2s1m0-lrckrx6²ki2s1m0-lrcktx6²ji2s1m0-sclkrx6²ii2s1m0-sclktx6²hi2s1m0-sdi06²li2s1m0-sdi16
²mi2s1m0-sdi26 ²ni2s1m0-sdi36²oi2s1m0-sdo06²pi2s1m0-sdo16²qi2s1m0-sdo26 ²ri2s1m0-sdo36
²si2s2i2s2m0-lrcktx6²ui2s2m0-sclktx6²ti2s2m0-sdi6²vi2s2m0-sdo6²wi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk6²xpdmm0-clk16²ypdmm0-sdi06²zpdmm0-sdi16
²{pdmm0-sdi26 ²|pdmm0-sdi36²}pmicpmic_int6´#pmupwm0pwm0m0-pins6²'pwm1pwm1m0-pins6²(pwm2pwm2m0-pins6²)pwm3pwm3-pins6²*pwm4pwm4-pins6² pwm5pwm5-pins6²¡pwm6pwm6-pins6²¢pwm7pwm7-pins6²£pwm8pwm8m0-pins6 ²¤pwm9pwm9m0-pins6
²¥pwm10pwm10m0-pins6
²¦pwm11pwm11m0-pins6²§pwm12pwm12m0-pins6²¨pwm13pwm13m0-pins6²©pwm14pwm14m0-pins6²ªpwm15pwm15m0-pins6²«refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@6³³³³_sdmmc0-clk6³`sdmmc0-cmd6³asdmmc0-det6´bsdmmc1sdmmc2spdifspdifm0-tx6²~spi0spi0m0-pins06
²²²†spi0m0-cs06²„spi0m0-cs16²…spi1spi1m0-pins06
²²²‰spi1m0-cs06²‡spi1m0-cs16²ˆspi2spi2m0-pins06²²²Œspi2m0-cs06²Šspi2m0-cs16²‹spi3spi3m0-pins06²²
²spi3m0-cs06²spi3m0-cs16²Žtsadctsadc-shutorg6²žtsadc-pin6²uart0uart0-xfer 6´´&uart1uart1m0-xfer 6´´uart2uart2m0-xfer 6´´‘uart3uart3m0-xfer 6´´’uart4uart4m0-xfer 6´´“uart5uart5m0-xfer 6´´”uart6uart6m0-xfer 6´´•uart7uart7m0-xfer 6´´–uart8uart8m0-xfer 6´´—uart9uart9m0-xfer 6´´˜vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac1m1-tx-bus2-level306¹¹²Kgmac1m1-rgmii-bus-level3@6²²¹¹Ngmac-txc-level2gmac1m1-rgmii-clk-level2 6²µMledssys-status-led-pin6²»usbvcc5v0-usb20-host-en6²½vcc5v0-usb30-host-en6
²¾chosenDserial2:1500000n8external-gmac1-clock,fixed-clockÀsY@Ðgmac1_clkin#hdmi-con,hdmi-connectorøaportendpointÛºZgpio-leds
,gpio-ledssys-ledPsys_led
Vheartbeatlonª"ídefaultã»usb-5v-regulator,regulator-fixed¢usb_5v±Å×LK@ïLK@¼vcc5v0-sys-regulator,regulator-fixed¢vcc5v0_sys±Å×LK@ïLK@¼!vcc3v3-sys-regulator,regulator-fixed¢vcc3v3_sys±Å×2Z ï2Z !$vcc3v3-pcie-regulator,regulator-fixed¢vcc3v3_pcie×2Z ï2Z z."ˆ!]vcc5v0-usb20-host-regulator,regulator-fixedz.Iídefaultã½¢vcc5v0_usb20_host±vcc5v0-usb30-host-regulator,regulator-fixedz.I
ídefaultã¾¢vcc5v0_usb30_host± interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplysupports-sdbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-hs200-1_8vnon-removablesupports-emmcdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathlabellinux,default-triggerdefault-stateenable-active-highstartup-delay-us